ALTERA Project for PreFRED

Introduction

Update 27 September 2007--Quartus II can now be used to compile and program the chips for this board. Instructions are here.

There are six PreFred boards used in Run II, located in the Global L1 crate (b0l1gl00).
In the PreFRED boards, three ALTERA  PLDs  are used, named "Control", "Processor" and "VME_Interface". The code is written in AHDL, with ALTERA MAX+PlusII V9.6.   This version however doesn't recognize the device for the e-proms, use V9.1 to convert from .sof to .pof files and v10.1 to program the chips (special PC with old  OS version .)
All PreFRED boards share the same VME_Interface and Control programs. The processor programs are specific to each board.

ALTERA Source Code

 
  • vme_interface.tdf: The VME Interface Chip.
  • control.tdf: The Control Chip.
  • Sumet.tdf: Processor code for SUMET triggers (slot 4).
  • Caltrg.tdf: Processor code for CALTRG triggers (slot 5).
  • Mutrg.tdf: Processor code for MUTRG triggers (slot 6).
  • Trktrg.tdf: Processor code for TRKTRG triggers (slot 7).
  • Bsctof.tdf: Processor code for BSC,RP,MP and TOF triggers (slot 10).
  • Bsctof_met.tdf: Removed BSC,RP,MP triggers. Add L1Met, TOF and cosmics triggers still there(slot 10).
  •          WaveForm File
  • Multi.tdf: Processor code for multipurpouse pfred board (slot 11).
    • .

    PIN Assigment (all boards)

  • vme_interface.pin: The VME Interface chip pinout.
  • control.pin: The Control chip pinout.
  • processor.pin: The Processor chip pinout.

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    Revised: 27 January 2003 - cgp.