TITLE "Pedestal subtraction of hmready data and gating to hmfire";

FUNCTION lpm_ram_dq (data[LPM_WIDTH-1..0], address[LPM_WIDTHAD-1..0], we,
         inclock, outclock)
   WITH (LPM_WIDTH, LPM_WIDTHAD, LPM_NUMWORDS, LPM_FILE, LPM_INDATA,
         LPM_ADDRESS_CONTROL, LPM_OUTDATA)
   RETURNS (q[LPM_WIDTH-1..0]);

FUNCTION lpm_ff (data[LPM_WIDTH-1..0], clock, enable, sclr, sset, sload,
         aclr, aset, aload)
   WITH (LPM_WIDTH, LPM_AVALUE, LPM_SVALUE, LPM_FFTYPE)
   RETURNS (q[LPM_WIDTH-1..0]);

FUNCTION lpm_add_sub (cin, dataa[LPM_WIDTH-1..0], datab[LPM_WIDTH-1..0],
         add_sub, clock, aclr)
   WITH (LPM_WIDTH, LPM_REPRESENTATION, LPM_DIRECTION, LPM_PIPELINE,
         ONE_INPUT_IS_CONSTANT)
   RETURNS (result[LPM_WIDTH-1..0], cout, overflow);

FUNCTION lpm_decode (data[LPM_WIDTH-1..0], enable, clock, aclr)
   WITH (LPM_WIDTH, LPM_DECODES, LPM_PIPELINE)
   RETURNS (eq[LPM_DECODES-1..0]);


SUBDESIGN hmaim
(
strip[9..0]		: INPUT;
adc[7..0]		: INPUT;
clock			: INPUT;
validin			: INPUT;
init			: INPUT;

vmepedramin[6..0]	: INPUT;
pedramaddress[9..0]	: INPUT;
pedramclock		: INPUT;
pedramwrite		: INPUT;
vmepedramout[6..0]	: OUTPUT;

vmethresholdin[6..0]	: INPUT;
thresholdaddress[2..0]	: INPUT;
thresholdclock		: INPUT;
thresholdwrite		: INPUT;
vmethresholdout[6..0]	: OUTPUT;

stripout[9..0]		: OUTPUT;
adcout[6..0]		: OUTPUT;
validout		: OUTPUT;
enableout		: OUTPUT;
)

VARIABLE
bvalid,dvalid,denable: lpm_ff WITH (LPM_WIDTH=1);
bstrip,dstrip: lpm_ff WITH (LPM_WIDTH=10);
badc,dadc :lpm_ff WITH (LPM_WIDTH=7);
pedram: lpm_ram_dq WITH 
        (LPM_ADDRESS_CONTROL="REGISTERED",
         LPM_FILE="ped.mif",
         LPM_INDATA="REGISTERED",
         LPM_OUTDATA="UNREGISTERED",
         LPM_WIDTH=7,
         LPM_WIDTHAD=10);
thresholdram: lpm_ram_dq WITH 
        (LPM_ADDRESS_CONTROL="REGISTERED",
         LPM_FILE="threshold.mif",
         LPM_INDATA="REGISTERED",
         LPM_OUTDATA="UNREGISTERED",
         LPM_WIDTH=7,
         LPM_WIDTHAD=3);
pedsubtract : lpm_add_sub WITH
              (LPM_DIRECTION="SUB",
               LPM_REPRESENTATION="UNSIGNED",
               LPM_WIDTH=7);             

BEGIN

% adc/pedestal pipeline %
  % read pedestal from pedram %
pedram.data[] = vmepedramin[];
pedram.address[] = pedramaddress[];
pedram.inclock = pedramclock;
pedram.we = pedramwrite;
  % read adc threshold from threshold ram %
thresholdram.data[] = vmethresholdin[];
thresholdram.address[] = thresholdaddress[];
thresholdram.inclock = thresholdclock;
thresholdram.we = thresholdwrite;

% stage b %
bstrip.clock = clock;
bstrip.data[] = strip[];
bstrip.aclr = init;

badc.clock = clock;
badc.data[] = adc[6..0];
badc.sclr = adc[7];
badc.aclr = init;

bvalid.clock = clock;
bvalid.data[] = validin;
bvalid.sclr = init;

% stage d % 
vmethresholdout[] = thresholdram.q[];
vmepedramout[] = pedram.q[];

pedsubtract.dataa[] = badc.q[];
pedsubtract.datab[] = pedram.q[];

dadc.clock = clock;
dadc.data[] = pedsubtract.result[];
dadc.sclr = !pedsubtract.cout;
dadc.aclr = init;

dstrip.clock = clock;
dstrip.data[] = bstrip.q[];
dstrip.aclr = init;

dvalid.clock = clock;
dvalid.data[] = bvalid.q[] &
  (pedsubtract.result[] > thresholdram.q[]) &
  pedsubtract.cout;
dvalid.aclr = init;

denable.data[] = bvalid.q[];
denable.clock = clock;
denable.aclr = init;

% outputs %
stripout[] = dstrip.q[];
adcout[] = dadc.q[]; 
validout = dvalid.q[] & !init;
enableout = denable.q[] & !init;

END;