TITLE "VME interface for chip ID registers in HITMAN chip";

FUNCTION lpm_mux (data[LPM_SIZE-1..0][LPM_WIDTH-1..0], 
	sel[LPM_WIDTHS-1..0], clock, aclr) 
   WITH (LPM_WIDTH, LPM_SIZE, LPM_WIDTHS, LPM_PIPELINE)
   RETURNS (result[LPM_WIDTH-1..0]);


SUBDESIGN vmechipidbus
(
  vmedata[5..0]		: INPUT;
  vmeclock		: INPUT;
  vmechipidread[7..0]	: INPUT;
  vmechipidwrite[7..0]	: INPUT;
  vmedataout[15..0]	: BIDIR;
  chipid[7..0][4..0]	: OUTPUT;
)

VARIABLE

chipid[7..0][4..0] :DFFE;
chipidvmetri0_[15..0] :TRI;
chipidvmetri1_[15..0] :TRI;
chipidvmetri2_[15..0] :TRI;
chipidvmetri3_[15..0] :TRI;
chipidvmetri4_[15..0] :TRI;
chipidvmetri5_[15..0] :TRI;
chipidvmetri6_[15..0] :TRI;
chipidvmetri7_[15..0] :TRI;
vmedatatri[15..0] :TRI_STATE_NODE;

BEGIN
 % write to chip id registers over VME %
chipid[0][].clk = vmeclock & vmechipidwrite[0];
IF (vmedata[5]) THEN
  chipid[0][].d = 0;
ELSE
  chipid[0][].d = vmedata[4..0];
END IF;
 % read chip id registers over VME %
chipidvmetri0_[4..0].in = chipid[0][].q;
chipidvmetri0_[15..5].in = GND;
chipidvmetri0_[].oe = vmechipidread[0];
vmedatatri[] = chipidvmetri0_[].out;

 % write to chip id registers over VME %
chipid[1][].clk = vmeclock & vmechipidwrite[1];
IF (vmedata[5]) THEN
  chipid[1][].d = 1;
ELSE
  chipid[1][].d = vmedata[4..0];
END IF;
 % read chip id registers over VME %
chipidvmetri1_[4..0].in = chipid[1][].q;
chipidvmetri1_[15..5].in = GND;
chipidvmetri1_[].oe = vmechipidread[1];
vmedatatri[] = chipidvmetri1_[].out;

 % write to chip id registers over VME %
chipid[2][].clk = vmeclock & vmechipidwrite[2];
IF (vmedata[5]) THEN
  chipid[2][].d = 2;
ELSE
  chipid[2][].d = vmedata[4..0];
END IF;
 % read chip id registers over VME %
chipidvmetri2_[4..0].in = chipid[2][].q;
chipidvmetri2_[15..5].in = GND;
chipidvmetri2_[].oe = vmechipidread[2];
vmedatatri[] = chipidvmetri2_[].out;

 % write to chip id registers over VME %
chipid[3][].clk = vmeclock & vmechipidwrite[3];
IF (vmedata[5]) THEN
  chipid[3][].d = 3;
ELSE
  chipid[3][].d = vmedata[4..0];
END IF;
 % read chip id registers over VME %
chipidvmetri3_[4..0].in = chipid[3][].q;
chipidvmetri3_[15..5].in = GND;
chipidvmetri3_[].oe = vmechipidread[3];
vmedatatri[] = chipidvmetri3_[].out;

 % write to chip id registers over VME %
chipid[4][].clk = vmeclock & vmechipidwrite[4];
IF (vmedata[5]) THEN
  chipid[4][].d = 4;
ELSE
  chipid[4][].d = vmedata[4..0];
END IF;
 % read chip id registers over VME %
chipidvmetri4_[4..0].in = chipid[4][].q;
chipidvmetri4_[15..5].in = GND;
chipidvmetri4_[].oe = vmechipidread[4];
vmedatatri[] = chipidvmetri4_[].out;

 % write to chip id registers over VME %
chipid[5][].clk = vmeclock & vmechipidwrite[5];
IF (vmedata[5]) THEN
  chipid[5][].d = 5;
ELSE
  chipid[5][].d = vmedata[4..0];
END IF;
 % read chip id registers over VME %
chipidvmetri5_[4..0].in = chipid[5][].q;
chipidvmetri5_[15..5].in = GND;
chipidvmetri5_[].oe = vmechipidread[5];
vmedatatri[] = chipidvmetri5_[].out;

 % write to chip id registers over VME %
chipid[6][].clk = vmeclock & vmechipidwrite[6];
IF (vmedata[5]) THEN
  chipid[6][].d = 6;
ELSE
  chipid[6][].d = vmedata[4..0];
END IF;
 % read chip id registers over VME %
chipidvmetri6_[4..0].in = chipid[6][].q;
chipidvmetri6_[15..5].in = GND;
chipidvmetri6_[].oe = vmechipidread[6];
vmedatatri[] = chipidvmetri6_[].out;

 % write to chip id registers over VME %
chipid[7][].clk = vmeclock & vmechipidwrite[7];
IF (vmedata[5]) THEN
  chipid[7][].d = 7;
ELSE
  chipid[7][].d = vmedata[4..0];
END IF;
 % read chip id registers over VME %
chipidvmetri7_[4..0].in = chipid[7][].q;
chipidvmetri7_[15..5].in = GND;
chipidvmetri7_[].oe = vmechipidread[7];
vmedatatri[] = chipidvmetri7_[].out;

vmedataout[] = vmedatatri[];

END;