How to modify GB's firmware.

Firmware location.

You can easily get GhostBuster firmware using CVS system.
How to setup the CVS system is described here. [CVS setup].
Then you should only type "cvs checkout ghostbuster".

Components inside ghostbuster directory

After typing "cd ghostbuster", you have 7 directories except CVS directory itself.
i.e. gb/, gb0/, mentor_graphics/, processor/, utility/, vme_test/ and vmechip/.
Core of GhostBuster firmware is packed in processor/ and utility/ directories.
In these directories, program "gb.tdf" is found and this is actual firmware for GB written in AHDL.
You may need to study on AHDL.
Other directories aims different purposes, but most of them are out of dates so that neglect them.

Altera simulation

You can understand the role of GB via Altera simulation.
"Altera" is company name and AHDL is hardware language for Altera chips.
We simulate works of the Altera chips employing this simulation.
To use Altera simulation, you may need "Quatus II" tools.
If you are not familiar with "QuartusII", you may need practice to use it with tutorial.
Here is simple exmplanation to use Altera simulation.
(1) In windows, you should double click "QuartusII" short cut, or select "Programs" -> "Altera" -> "QuartusII".
(2) You will have QuartusII window.
(3) Choose "File"->"Open project". And point your ghostbuster/processor directory and select "gb.quartus"
(4) Then please select "Processing"->"Compile mode" Again, "processing" -> "Start compilation".
(5) If you succeed the compilation (if you don't touch anything this must succeed),
you should choose "Processing" -> "simulation mode".
After that, "Processing" -> "start simulation" should be selected.
(6) Resulting, you will have a timing trace screen.
Of course, you need to change the input file of simulation (gb.vwf) if you want to prove new firmware works well.
In order to change the input file, you have gb.py file in processor directory.
This is python-based file to create Altera simulation file made by Bill Ashmanskas.
It's quite smart file because you don't have to create input file "by hand as manual said". (What a smart)
To create gbq.vwf (input file), please type,
"python gbq.py" in your linux machine. That all you need.
Eventually, you have another output file from gbq.py, that is "gbinput.dat" as a text file below mentioned.
In fact, gbq.py creates quite good random track packets mimic the TF output. [Track packets for CDF_SVT (ps)].

How to install the GB firmware

After your compilation, you have the three files,
gb.pof, gb_1.pof and gb.sof, and these are needed to install. How to install is described another page.

C-based electronics simulation

Wise reader soon find "svtsim" directory in the processor/.
Under this directory, there is C-programmed simulation program for GB bit operation to compare between Altera.
On svtsim/ sirectory, typing "gmake" and "./gbsim ../gbinput.dat gboutput.dat" creates output file("gboutput.dat") to be comapred.
Actually, input file, "../gbinput.dat" was created by "gbq.py". So, we directly compare Altera simulation result and gboutput.dat.

Mentor Graphics simulation

Unfortunately, Altera simulation is incomplete to simulate the whole board
because Altera can simulate only Altera chip part (e.g. FIFO).
As you know, GB is quite simple board, so remaining part to simulate is Flush Memory or FIFO.
Folloing are the way to use Mentor Graphics.
(1) Login to the e-shop (U of C) machine. Only GB schematic is available on it.
(2) Select "Programs" -> "Mentor Graphics" -> "MKS Korn Shell".
(3) Type "cd y:\CDF_SVT\" in apperaed Korn Shell window.
(4) Type "./qgb". This is script name which runs the Mentor Graphics simulation.
(5) Timing trace screen apperaed. You can check the output to be comapared with svtsim. (file "gboutput.dat")

Mentor Graphics also needs simulation input file.
As was surprised, this can be prepared from Bill Ashmanskas's another python program.
That is located in "ghostbuster/mentor_graphics/qsim_gb.py".
Same as gbq.py, you only need type "python qsim_gb.py gb".
So, you have input file, "qsim_gb.ff". (You need copy this file to "/designs/CDF_SVT/.")
One thing mainly different from "gbq.py" is that we have to create track input by hand for "qsim_gb.py" case.

Hereafter, I explain how to modified mif-file and vho-file for Mentor Graphics.
Mif-file is used to initialize the Flush Memory data.
Currently, (1) Flush Memory #1 uses fram1.mif, (2) #2 uses fram2.mif and (3) #3 uses fram3.mif in th e/designs/CDF_SVT/GhostBuster/.
If you need change the stored data in Flush RAM, you also need change this mif files. Otherwise, you cannot simulate correctly.
vho-file are VHDL file created from Altera simulation.
Mentor Graphics simulation only allows VHDL language, so that we need translate the AHDL using Altera simulation.
At present, QuartusII version 1.1 can only translate this well. Thus, please use version1.1 for Mentor Graphics.
After compilation of Altera part, you have simulation/vss/{gb.vho, gb_vhd.sdo} under the processor/ directory. These are translated files. These files shold be copied to /designs/CDF_SVT/GhostBuster/. also.

Unfortunately, situation is getting complicated after August-2002.
Because I divide functionalities of each 3 chips.
Therefore, now, we need to create {gb1.vho, gb2.vho, gb3.vho} and { gb1_vhd.sdo, gb3_vhd.sdo, gb3_vhd.sdo}.
One way to create these files is "cp -r /processor processor_1" and so on, and change character "gb"->"gb1" in the files
{gb.csf* gb.psf* gb.quartus* gb.tdf* idprom.tdf*}.
Then compile, gb1.tdf, gb2.tdf and gb3.tdf to create.
Now I use processor_1 (copy of processor directory) as a chip#1 vho, utility_2,3 (copy of utility directory) as chip#2,3 cho-file.

Finally, I talk about how to change the viewpoint of GB schematic.
This handing is quite rare case, but is useful for something.
For example, I assume I'd like to change reading mif-file, from "y:/CDF_SVT/GhostBuster/fram1.mif" to "y:\CDF_SVT\GhostBuster\fram1.mif".
(1) Please open the schematic of GhostBuster Board using "open sheet" in timing trace window (right-side).
(2) Select "chip sheet" and "ctrl-F8".
(3) You can select Altera-chip, FRAM and so on. In this time, you select FRAM.
(4) Button right-side mouse, and select "Edit"->"Property"->"Change".
(5) You can change mif-file name now.
(6) In main screen, you choose "File"->"save"->"design changes".
(7) Also "File"->"save"->"setup".

I know this explanation is quite imcomplete. If I can, I will update. (In particular, chip divided functionalities and schematic topics. sorry)

Real board testing

Files on ghostbuster/vme_test/* are sample program of real borad.
Before testing, we must upload the firmware. But, this is described Bill's page (almost final part of this page). [misc note].